UVM Theses and Dissertations
Format:
Print
Author:
Campbell, T. Justin
Dept./Program:
Electrical Engineering
Year:
2005
Degree:
M.S.
Abstract:
As speeds of digital circuits and transmission systems increase, jitter plays a larger role in terms of timing margins. System failure due to a jittery PLL implies the need to apply better testing and diagnostics of the jitter in a system. Stringent requirements on maximum allowable clock jitter have highlighted the importance and cost of jitter measurement in the production environment. In terms of production test, characterizing jitter allows for the screening of a 'bad' device from a 'good' one. There is a variety of laboratory equipment that allow for characterization of jitter; real-time digital oscilloscopes (RTO), sampling time interval analyzers (TIA), equivalent time sampling oscilloscopes, analog phase detectors, and bit-error rate testers (BERT). However, this equipment is not sufficient for real-time, cost efficient characterization needed for production test.
A novel low-cost jitter measurement circuit for production test is presented. The hardware implementation is based on the so-called analytic signal method. The circuit consists of two parts: high-speed ADC sampling and DSP computation. The uniqueness of this circuit comes from the fact that the FPGA is used as both the ADC sampling controller and the main computation engine, which can significantly reduce the test cost. The outcome of this thesis produced a 10ps resolution jitter measurement circuit with total cost under $1000, and total test time for rms jitter acquisition under 6 seconds. To validate the design effectiveness, measurements results were compared between various instruments and this proposed circuit. Results show that the proposed circuit yielded jitter frequency and magnitude extraction from the signal-under test (SUT). Jitter injection was achieved via a phase-modulation methodology. The amplitude of the modulating signal was set to 500mV, and signal-under-test (SUT) frequency and amplitude of 14MHz and 1V respectively, the proposed jitter measurement circuit measured and rms value of 158ps, whilst the Wavecrest Time-Interval Analyzer (TIA) reported 153.8ps and the Lecroy Real-Time Oscilliscope (RTO) reported 158ps. The measured periodic jitter for this case was predicted to be 181.3ps. The magnitude of the frequency of the jitter was also extracted via our jitter measurement circuit, showing peak frequencies at 50KHz, 100KHz, and 200KHz respectively, with jitter injected at these frequencies using frequency-modulation techniques.
A novel low-cost jitter measurement circuit for production test is presented. The hardware implementation is based on the so-called analytic signal method. The circuit consists of two parts: high-speed ADC sampling and DSP computation. The uniqueness of this circuit comes from the fact that the FPGA is used as both the ADC sampling controller and the main computation engine, which can significantly reduce the test cost. The outcome of this thesis produced a 10ps resolution jitter measurement circuit with total cost under $1000, and total test time for rms jitter acquisition under 6 seconds. To validate the design effectiveness, measurements results were compared between various instruments and this proposed circuit. Results show that the proposed circuit yielded jitter frequency and magnitude extraction from the signal-under test (SUT). Jitter injection was achieved via a phase-modulation methodology. The amplitude of the modulating signal was set to 500mV, and signal-under-test (SUT) frequency and amplitude of 14MHz and 1V respectively, the proposed jitter measurement circuit measured and rms value of 158ps, whilst the Wavecrest Time-Interval Analyzer (TIA) reported 153.8ps and the Lecroy Real-Time Oscilliscope (RTO) reported 158ps. The measured periodic jitter for this case was predicted to be 181.3ps. The magnitude of the frequency of the jitter was also extracted via our jitter measurement circuit, showing peak frequencies at 50KHz, 100KHz, and 200KHz respectively, with jitter injected at these frequencies using frequency-modulation techniques.