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Smith, Jack R.

Electrical Engineering

2007

PhD

Programmable logic devices are widely used in computing systems. These devices are prefabricated chips that are programmed by the customer to implement logic functions that they need. Field Programmable Gate Arrays (FPGAs) are one of the most popular types of programmable logic devices because their dense array of logic blocks and signal routing structures can be reprogrammed millions of times in the customer's system at normal operating voltages. FPGAs were initially intended for rapid prototyping to achieve short time-to-market and low development cost. However, due to recent VLSI technology advances, today's FPGAs have huge logic capacity and operate at clock speeds over 100 MHz and hence they are commonly used as production chips. Unfortunately, these new FPGAs have a larger number of defects than prior generations and are more difficult to test for all possible faults in the programmable logic and routing. In addition, the defects are most likely to occur in the interconnect structure which covers a majority of the chip area. Therefore, previous research has successfully applied Built- In Self-Test (BIST) approaches to test the interconnect. The work presented here extends this research by disclosing new BIST techniques that reduce the test time, offer fault diagnosis capabilities, and provide greater accuracy in detecting delay faults.